1. Field of the Disclosure
The present disclosure relates to a device structure of an avalanche photodiode.
2. Discussion of the Background Art
An avalanche multiplier photodiode (avalanche photodiode: APD) has been widely introduced as a highly-sensitive light receiving device for a 10-Gb/s optical communication system. Although a hole-injection type in which InP is an avalanche multiplier layer (avalanche layer) is a typical APD structure, in terms of rapidity and avalanche excess noise characteristics, an electron-injection type APD in which InAlAs is used in an avalanche multiplier layer has recently attracted attention. This is because since the ionization coefficient ratio between the electrons and the holes is larger in the electron-injection type, avalanche excess noise is low, and, in addition, since a gain-band product (GB product) increases, the electron-injection type APD has receiver sensitivity more excellent than that of the hole-injection type APD.
In order to secure normal operation of APD, a so-called “guard ring technique” for suppressing edge breakdown around a junction is essential. In the hole-injection type, although a so-called “ion-injection type guard ring structure” is used, it is generally difficult to apply a guard ring having a similar form to the electron-injection type APD.
Thus, there have been proposed some structures that avoid edge breakdown without forming an intended guard ring. Patent Document 1 proposes one of such structures and discloses a configuration in which an embedded n-electrode layer is disposed on a substrate side to specify an avalanche region. In this structure, since a p-type InGaAs light absorbing layer can be used, the receiver sensitivity is excellent. Meanwhile, the structure of the Patent Document 1 is modified, whereby a method for suppressing an edge electric field more stably has been proposed (for example, see Patent Document 2).
FIG. 10 shows an inverted APD structure disclosed in the Patent Document 2. In this structure, a p-type light absorbing layer 33A formed of InGaAs and a light absorbing layer 33B formed of InGaAs are arranged on the substrate side, and an “electron transit layer 37B” in which the electric field is reduced more than in the case of an avalanche multiplier layer 36 is provided between the avalanche multiplier layer 36 and an n-type electrode buffer layer 38A. When an internal electric field distribution of APD is “low (light absorbing layers (33A and 33B))—high (avalanche multiplier layer 36)—low (electron transit layer 37B)”, an edge electric field is generated in the n-type electrode buffer layer 38A and the electron transit layer (37B). Since a band gap of the electron transit layer 37B can be sufficiently made large compared to InGaAs (for example, InP and InAlAs), even if an electric field concentration depending on the shapes of the n-type electrode buffer layer 38A and the n-type electrode layer 38B occurs, breakdown due to the electric field concentration at the portion does not occur. At the same time, the electron transit layer 37B is inserted between the n-type electrode buffer layer 38A and the avalanche multiplier layer 36 to be separated at a distance from each other, whereby the edge electric field is not applied to the avalanche multiplier layer 36, and the edge breakdown can be suppressed.